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IEEE/ISO/IEC-Telecommunications and exchange between information technology systems -- Requirements for local and metropolitan area networks -- Part 3:
Standard for Ethernet AMENDMENT 2: Physical layer and management parameters for power over Ethernet ove, 2021
- IEEE Std 802.3bt™-2018 front cover
- Title page
- Important Notices and Disclaimers Concerning IEEE Standards Documents
- Participants
- Introduction
- Contents
- 1. Introduction [Go to Page]
- 1.3 Normative references
- 1.4 Definitions
- 1.5 Abbreviations
- 14. Twisted-pair medium attachment unit (MAU) and baseband medium, type 10BASE-T including type 10BASE-Te [Go to Page]
- 14.3 MAU electrical specifications [Go to Page]
- 14.3.1 MAU-to-MDI interface characteristics [Go to Page]
- 14.3.1.1 Isolation requirement
- 25. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX [Go to Page]
- 25.4 Specific requirements and exceptions [Go to Page]
- 25.4.5 Change to 9.1.7, “Worst case droop of transformer”
- 25.4.6 Replacement of 8.4.1, “UTP isolation requirements”
- 25.4.7 Addition to 10.1, “Receiver”
- 25.6 Protocol implementation conformance statement (PICS) proforma for Clause 25, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX [Go to Page]
- 25.6.3 Major capabilities/options [Go to Page]
- 25.6.3.1 DTE Power via MDI Power over Ethernet major capabilities/options
- 25.6.4 PICS proforma tables for the Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX [Go to Page]
- 25.6.4.4 DTE Power via MDI Power over Ethernet compliance
- 30. Management [Go to Page]
- 30.2 Managed objects [Go to Page]
- 30.2.2 Overview of managed objects [Go to Page]
- 30.2.2.1 Text description of managed objects
- 30.2.3 Containment
- 30.2.5 Capabilities
- 30.9 Management for DTE Power via MDI Power over Ethernet [Go to Page]
- 30.9.1 PSE managed object class [Go to Page]
- 30.9.1.1 PSE attributes [Go to Page]
- 30.9.1.1.2 aPSEAdminState
- 30.9.1.1.3 aPSEPowerPairsControlAbility
- 30.9.1.1.4 aPSEPowerPairs
- 30.9.1.1.5 aPSEPowerDetectionStatus
- 30.9.1.1.5a aPSEPowerDetectionStatusA
- 30.9.1.1.5b aPSEPowerDetectionStatusB
- 30.9.1.1.6 aPSEPowerClassification
- 30.9.1.1.6a aPSEPowerClassificationA
- 30.9.1.1.6b aPSEPowerClassificationB
- 30.9.1.1.7 aPSEInvalidSignatureCounter
- 30.9.1.1.7a aPSEInvalidSignatureCounterA
- 30.9.1.1.7b aPSEInvalidSignatureCounterB
- 30.9.1.1.8 aPSEPowerDeniedCounter
- 30.9.1.1.8a aPSEPowerDeniedCounterA
- 30.9.1.1.8b aPSEPowerDeniedCounterB
- 30.9.1.1.9 aPSEOverLoadCounter
- 30.9.1.1.9a aPSEOverLoadCounterA
- 30.9.1.1.10 aPSEShortCounter aPSEOverLoadCounterB
- 30.9.1.1.11 aPSEMPSAbsentCounter
- 30.9.1.1.11a aPSEMPSAbsentCounterA
- 30.9.1.1.11b aPSEMPSAbsentCounterB
- 30.9.1.2 PSE actions [Go to Page]
- 30.9.1.2.1 acPSEAdminControl
- 30.12 Layer Management for Link Layer Discovery Protocol (LLDP) [Go to Page]
- 30.12.2 LLDP Local System Group managed object class [Go to Page]
- 30.12.2.1 LLDP Local System Group attributes [Go to Page]
- 30.12.2.1.6 aLldpXdot3LocPowerMDISupported
- 30.12.2.1.7 aLldpXdot3LocPowerMDIEnabled
- 30.12.2.1.8 aLldpXdot3LocPowerPairControllable
- 30.12.2.1.9 aLldpXdot3LocPowerPairs
- 30.12.2.1.10 aLldpXdot3LocPowerClass
- 30.12.2.1.14 aLldpXdot3LocPowerType
- 30.12.2.1.17 aLldpXdot3LocPDRequestedPowerValue
- 30.12.2.1.17a aLldpXdot3LocPDRequestedPowerValueA
- 30.12.2.1.17b aLldpXdot3LocPDRequestedPowerValueB
- 30.12.2.1.18 aLldpXdot3LocPSEAllocatedPowerValue
- 30.12.2.1.18a aLldpXdot3LocPSEAllocatedPowerValueA
- 30.12.2.1.18b aLldpXdot3LocPSEAllocatedPowerValueB
- 30.12.2.1.18c aLldpXdot3LocPSEPoweringStatus
- 30.12.2.1.18d aLldpXdot3LocPDPoweredStatus
- 30.12.2.1.18e aLldpXdot3LocPowerPairsExt
- 30.12.2.1.18f aLldpXdot3LocPowerClassExtA
- 30.12.2.1.18g aLldpXdot3LocPowerClassExtB
- 30.12.2.1.18h aLldpXdot3LocPowerClassExt
- 30.12.2.1.18i aLldpXdot3LocPowerTypeExt
- 30.12.2.1.18j aLldpXdot3LocPDLoad
- 30.12.2.1.18k aLldpXdot3LocPD4PID
- 30.12.2.1.18l aLldpXdot3LocPSEMaxAvailPower
- 30.12.2.1.18m aLldpXdot3LocPSEAutoclassSupport
- 30.12.2.1.18n aLldpXdot3LocAutoclassCompleted
- 30.12.2.1.18o aLldpXdot3LocAutoclassRequest
- 30.12.2.1.18p aLldpXdot3LocPowerDownRequest
- 30.12.2.1.18q aLldpXdot3LocPowerDownTime
- 30.12.2.1.18r aLldpXdot3LocMeasVoltageSupport
- 30.12.2.1.18s aLldpXdot3LocMeasCurrentSupport
- 30.12.2.1.18t aLldpXdot3LocMeasPowerSupport
- 30.12.2.1.18u aLldpXdot3LocMeasEnergySupport
- 30.12.2.1.18v aLldpXdot3LocMeasurementSource
- 30.12.2.1.18w aLldpXdot3LocMeasVoltageRequest
- 30.12.2.1.18x aLldpXdot3LocMeasCurrentRequest
- 30.12.2.1.18y aLldpXdot3LocMeasPowerRequest
- 30.12.2.1.18z aLldpXdot3LocMeasEnergyRequest
- 30.12.2.1.18aa aLldpXdot3LocMeasVoltageValid
- 30.12.2.1.18ab aLldpXdot3LocMeasCurrentValid
- 30.12.2.1.18ac aLldpXdot3LocMeasPowerValid
- 30.12.2.1.18ad aLldpXdot3LocMeasEnergyValid
- 30.12.2.1.18ae aLldpXdot3LocMeasVoltageUncertainty
- 30.12.2.1.18af aLldpXdot3LocMeasCurrentUncertainty
- 30.12.2.1.18ag aLldpXdot3LocMeasPowerUncertainty
- 30.12.2.1.18ah aLldpXdot3LocMeasEnergyUncertainty
- 30.12.2.1.18ai aLldpXdot3LocVoltageMeasurement
- 30.12.2.1.18aj aLldpXdot3LocCurrentMeasurement
- 30.12.2.1.18ak aLldpXdot3LocPowerMeasurement
- 30.12.2.1.18al aLldpXdot3LocEnergyMeasurement
- 30.12.2.1.18am aLldpXdot3LocPSEPowerPriceIndex
- 30.12.3 LLDP Remote System Group managed object class [Go to Page]
- 30.12.3.1 LLDP Remote System Group attributes [Go to Page]
- 30.12.3.1.6 aLldpXdot3RemPowerMDISupported
- 30.12.3.1.7 aLldpXdot3RemPowerMDIEnabled
- 30.12.3.1.8 aLldpXdot3RemPowerPairControllable
- 30.12.3.1.9 aLldpXdot3RemPowerPairs
- 30.12.3.1.10 aLldpXdot3RemPowerClass
- 30.12.3.1.14 aLldpXdot3RemPowerType
- 30.12.3.1.17 aLldpXdot3RemPDRequestedPowerValue
- 30.12.3.1.17a aLldpXdot3RemPDRequestedPowerValueA
- 30.12.3.1.17b aLldpXdot3RemPDRequestedPowerValueB
- 30.12.3.1.18 aLldpXdot3RemPSEAllocatedPowerValue
- 30.12.3.1.18a aLldpXdot3RemPSEAllocatedPowerValueA
- 30.12.3.1.18b aLldpXdot3RemPSEAllocatedPowerValueB
- 30.12.3.1.18c aLldpXdot3RemPSEPoweringStatus
- 30.12.3.1.18d aLldpXdot3RemPDPoweredStatus
- 30.12.3.1.18e aLldpXdot3RemPowerPairsExt
- 30.12.3.1.18f aLldpXdot3RemPowerClassExtA
- 30.12.3.1.18g aLldpXdot3RemPowerClassExtB
- 30.12.3.1.18h aLldpXdot3RemPowerClassExt
- 30.12.3.1.18i aLldpXdot3RemPowerTypeExt
- 30.12.3.1.18j aLldpXdot3RemPDLoad
- 30.12.3.1.18k aLldpXdot3RemPD4PID
- 30.12.3.1.18l aLldpXdot3RemPSEMaxAvailPower
- 30.12.3.1.18m aLldpXdot3RemPSEAutoclassSupport
- 30.12.3.1.18n aLldpXdot3RemAutoclassCompleted
- 30.12.3.1.18o aLldpXdot3RemAutoclassRequest
- 30.12.3.1.18p aLldpXdot3RemPowerDownRequest
- 30.12.3.1.18q aLldpXdot3RemPowerDownTime
- 30.12.3.1.18r aLldpXdot3RemMeasVoltageSupport
- 30.12.3.1.18s aLldpXdot3RemMeasCurrentSupport
- 30.12.3.1.18t aLldpXdot3RemMeasPowerSupport
- 30.12.3.1.18u aLldpXdot3RemMeasEnergySupport
- 30.12.3.1.18v aLldpXdot3RemMeasurementSource
- 30.12.3.1.18w aLldpXdot3RemMeasVoltageRequest
- 30.12.3.1.18x aLldpXdot3RemMeasCurrentRequest
- 30.12.3.1.18y aLldpXdot3RemMeasPowerRequest
- 30.12.3.1.18z aLldpXdot3RemMeasEnergyRequest
- 30.12.3.1.18aa aLldpXdot3RemMeasVoltageValid
- 30.12.3.1.18ab aLldpXdot3RemMeasCurrentValid
- 30.12.3.1.18ac aLldpXdot3RemMeasPowerValid
- 30.12.3.1.18ad aLldpXdot3RemMeasEnergyValid
- 30.12.3.1.18ae aLldpXdot3RemMeasVoltageUncertainty
- 30.12.3.1.18af aLldpXdot3RemMeasCurrentUncertainty
- 30.12.3.1.18ag aLldpXdot3RemMeasPowerUncertainty
- 30.12.3.1.18ah aLldpXdot3RemMeasEnergyUncertainty
- 30.12.3.1.18ai aLldpXdot3RemVoltageMeasurement
- 30.12.3.1.18aj aLldpXdot3RemCurrentMeasurement
- 30.12.3.1.18ak aLldpXdot3RemPowerMeasurement
- 30.12.3.1.18al aLldpXdot3RemEnergyMeasurement
- 30.12.3.1.18am aLldpXdot3RemPSEPowerPriceIndex
- 33. Data Terminal Equipment (DTE) Power via Media Dependent Interface (MDI) Power over Ethernet over 2 Pairs [Go to Page]
- 33.1 Overview [Go to Page]
- 33.1.1 Objectives
- 33.1.3 Relationship of DTE Power via MDI Power over Ethernet to the IEEE 802.3 Architecture
- 33.2 Power sourcing equipment (PSE) [Go to Page]
- 33.2.1 PSE location
- 33.2.2 Midspan PSE types
- 33.3 Powered devices (PDs) [Go to Page]
- 33.3.1 PD PI
- 33.4 Additional electrical specifications [Go to Page]
- 33.4.2 Fault tolerance
- 33.4.3 Impedance balance
- 33.4.4 Common-mode output voltage
- 33.4.6 Differential noise voltage
- 33.4.7 Return loss
- 33.4.9 Midspan PSE device additional requirements [Go to Page]
- 33.4.9.1 “Connector” or “telecom outlet” Midspan PSE device transmission requirements [Go to Page]
- 33.4.9.1.1 Near End Crosstalk (NEXT)
- 33.4.9.1.2 Insertion loss
- 33.4.9.1.3 Return loss
- 33.4.9.1a 33.4.9.1.4 Work area or equipment cable Cord Midspan PSE [Go to Page]
- 33.4.9.1a.1 Maximum link delay
- 33.4.9.1a.2 Maximum link delay skew
- 33.4.9.1b Coupling parameters between link segments [Go to Page]
- 33.4.9.1b.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
- 33.4.9.1b.2 Multiple disturber power sum alien far-end crosstalk (PSAFEXT) loss
- 33.6 Data Link Layer classification [Go to Page]
- 33.6.3 Power control state diagrams [Go to Page]
- 33.6.3.3 Variables
- 33.8 Protocol implementation conformance statement (PICS) proforma for Clause 33, DTE Power via MDI Power over Ethernet over 2 Pairs [Go to Page]
- 33.8.1 Introduction
- 33.8.2 Identification [Go to Page]
- 33.8.2.2 Protocol summary
- 33.8.3 PICS proforma tables for DTE Power via MDI Power over Ethernet over 2 Pairs [Go to Page]
- 33.8.3.4 Electrical specifications applicable to the PSE and PD
- 40. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 1000BASE-T [Go to Page]
- 40.6 PMA electrical specifications [Go to Page]
- 40.6.1 PMA-to-MDI interface tests [Go to Page]
- 40.6.1.1 Isolation requirement
- 55. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T [Go to Page]
- 55.5 PMA electrical specifications [Go to Page]
- 55.5.1 Isolation requirement
- 79. IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements [Go to Page]
- 79.1 Overview [Go to Page]
- 79.1.1 IEEE 802.3 LLDP frame format [Go to Page]
- 79.1.1.3 Length/Type field
- 79.3 IEEE 802.3 Organizationally Specific TLVs [Go to Page]
- 79.3.2 Power Via MDI TLV [Go to Page]
- 79.3.2.1 MDI power support [Go to Page]
- 79.3.2.1.1 Port class
- 79.3.2.1.2 PSE MDI power support
- 79.3.2.1.3 PSE MDI power state
- 79.3.2.1.4 PSE pairs control ability
- 79.3.2.2 PSE power pair
- 79.3.2.3 Power class
- 79.3.2.4 Requested pPower type/source/priority [Go to Page]
- 79.3.2.4.1 Power type
- 79.3.2.4.2a PD 4PID
- 79.3.2.5 PD requested power value
- 79.3.2.6 PSE allocated power value
- 79.3.2.6a Dual-signature PD requested power value for Mode A and Mode B
- 79.3.2.6b PSE allocated power value Alternative A and Alternative B
- 79.3.2.6c Power status [Go to Page]
- 79.3.2.6c.1 PSE powering status
- 79.3.2.6c.2 PD powered status
- 79.3.2.6c.3 PSE power pairs ext
- 79.3.2.6c.4 Dual-signature power Class ext Mode A
- 79.3.2.6c.5 Dual-signature power Class ext Mode B
- 79.3.2.6c.6 Power Class ext
- 79.3.2.6d System setup [Go to Page]
- 79.3.2.6d.1 Power Type ext
- 79.3.2.6d.2 PD Load
- 79.3.2.6e PSE maximum available power value
- 79.3.2.6f Autoclass [Go to Page]
- 79.3.2.6f.1 PSE Autoclass support
- 79.3.2.6f.2 Autoclass completed
- 79.3.2.6f.3 Autoclass request
- 79.3.2.6g Power down [Go to Page]
- 79.3.2.6g.1 Power down request
- 79.3.2.6g.2 Power down time
- 79.3.8 Power via MDI Measurements TLV [Go to Page]
- 79.3.8.1 Measurements
- 79.3.8.2 PSE power price index
- 79.3.8.3 Power Via MDI Measurements TLV usage rules
- 79.4 IEEE 802.3 Organizationally Specific TLV selection management [Go to Page]
- 79.4.2 IEEE 802.3 Organizationally Specific TLV/LLDP Local and Remote System group managed object class cross references
- 79.5 Protocol implementation conformance statement (PICS) proforma for IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements [Go to Page]
- 79.5.3 Major capabilities/options
- 79.5.8 Power Via MDI TLV
- 79.5.12 Power via MDI Measurements TLV
- 126. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 2.5GBASE-T and 5GBASE-T [Go to Page]
- 126.5 PMA electrical specifications [Go to Page]
- 126.5.1 Isolation requirement
- 145. Power over Ethernet [Go to Page]
- 145.1 Overview [Go to Page]
- 145.1.1 Compatibility considerations
- 145.1.2 Relationship of Power over Ethernet to the IEEE 802.3 Architecture
- 145.1.3 System parameters
- 145.1.4 Cabling requirements
- 145.2 Power sourcing equipment (PSE) [Go to Page]
- 145.2.1 PSE Type descriptions
- 145.2.2 PSE location
- 145.2.3 Midspan PSE variants
- 145.2.4 PSE PI
- 145.2.5 PSE state diagrams [Go to Page]
- 145.2.5.1 State diagram overview and timing
- 145.2.5.2 Conventions
- 145.2.5.3 Constants
- 145.2.5.4 Variables
- 145.2.5.5 Timers
- 145.2.5.6 Functions
- 145.2.5.7 State diagrams
- 145.2.6 PSE detection of PDs [Go to Page]
- 145.2.6.1 PSE detection validation circuit
- 145.2.6.2 Detection probe requirements
- 145.2.6.3 Detection criteria
- 145.2.6.4 Rejection criteria
- 145.2.6.5 Open circuit criteria
- 145.2.7 Connection check
- 145.2.8 PSE classification of PDs and mutual identification [Go to Page]
- 145.2.8.1 PSE Multiple-Event Physical Layer classification
- 145.2.8.2 Autoclass (optional)
- 145.2.9 4PID requirements
- 145.2.10 Power supply output [Go to Page]
- 145.2.10.1 Output voltage in the power on states
- 145.2.10.2 Output voltage pair-to-pair difference
- 145.2.10.3 Voltage transients
- 145.2.10.4 Reflected voltage
- 145.2.10.5 Power feeding ripple and noise
- 145.2.10.6 Continuous current capability in the power on states [Go to Page]
- 145.2.10.6.1 PSE pair-to-pair current unbalance
- 145.2.10.7 Current during power up
- 145.2.10.8 Overload current
- 145.2.10.9 Short circuit current
- 145.2.10.10 Turn off time
- 145.2.10.11 Turn off voltage
- 145.2.10.12 Intra-pair current unbalance
- 145.2.10.13 Type power
- 145.2.10.14 Power turn on time
- 145.2.10.15 Error delay timing
- 145.2.10.16 PSE stability
- 145.2.11 Power supply allocation
- 145.2.12 PSE Maintain Power Signature (MPS) requirements
- 145.3 Powered devices (PDs) [Go to Page]
- 145.3.1 PD Type descriptions
- 145.3.2 PD PI
- 145.3.3 PD state diagrams [Go to Page]
- 145.3.3.1 Conventions
- 145.3.3.2 Mode designation
- 145.3.3.3 Single-signature PD state diagrams [Go to Page]
- 145.3.3.3.1 Constants
- 145.3.3.3.2 Variables
- 145.3.3.3.3 Timers
- 145.3.3.3.4 Functions
- 145.3.3.3.5 State diagrams
- 145.3.3.4 Dual-signature PD state diagram [Go to Page]
- 145.3.3.4.1 Constants
- 145.3.3.4.2 Variables
- 145.3.3.4.3 Timers
- 145.3.3.4.4 Functions
- 145.3.3.4.5 State diagram
- 145.3.4 PD valid and non-valid detection signatures
- 145.3.5 PD signature configurations
- 145.3.6 PD classification [Go to Page]
- 145.3.6.1 PD Multiple-Event class signature [Go to Page]
- 145.3.6.1.1 Mark Event behavior
- 145.3.6.2 Autoclass (optional)
- 145.3.7 PSE Type identification
- 145.3.8 PD power [Go to Page]
- 145.3.8.1 Input voltage
- 145.3.8.2 Input average power [Go to Page]
- 145.3.8.2.1 Input average power exceptions
- 145.3.8.2.2 System stability test conditions during startup and steady state operation
- 145.3.8.3 Input inrush current
- 145.3.8.4 Peak operating power [Go to Page]
- 145.3.8.4.1 Peak operating power exceptions
- 145.3.8.5 Input current slew rate
- 145.3.8.6 PD behavior during transients at the PSE PI
- 145.3.8.7 Ripple and noise
- 145.3.8.8 Reflected voltage
- 145.3.8.9 PD pair-to-pair current unbalance
- 145.3.9 PD Maintain Power Signature
- 145.4 Additional electrical specifications [Go to Page]
- 145.4.1 Isolation [Go to Page]
- 145.4.1.1 Electrical isolation environments [Go to Page]
- 145.4.1.1.1 Environment A requirements
- 145.4.1.1.2 Environment B requirements
- 145.4.2 Fault tolerance
- 145.4.3 Impedance balance
- 145.4.4 Common-mode output voltage
- 145.4.5 Pair-to-pair output noise voltage
- 145.4.6 Differential noise voltage
- 145.4.7 Return loss
- 145.4.8 100BASE-TX transformer droop
- 145.4.9 Midspan PSE device additional requirements [Go to Page]
- 145.4.9.1 Connector Midspan PSE device transmission requirements [Go to Page]
- 145.4.9.1.1 Near End Crosstalk (NEXT)
- 145.4.9.1.2 Insertion loss
- 145.4.9.1.3 Return loss
- 145.4.9.2 Cord Midspan PSE [Go to Page]
- 145.4.9.2.1 Maximum link delay
- 145.4.9.2.2 Maximum link delay skew
- 145.4.9.3 Midspan signal path requirements [Go to Page]
- 145.4.9.3.1 Alternative A Midspan PSE signal path transfer function
- 145.4.9.4 Coupling parameters between link segments [Go to Page]
- 145.4.9.4.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
- 145.4.9.4.2 Multiple disturber power sum alien far-end crosstalk (PSAFEXT) loss
- 145.5 Data Link Layer classification [Go to Page]
- 145.5.1 TLV frame definition
- 145.5.2 Data Link Layer classification timing requirements
- 145.5.3 Power control state diagrams [Go to Page]
- 145.5.3.1 Conventions
- 145.5.3.2 PSE power control state diagrams [Go to Page]
- 145.5.3.2.1 Alternative designation
- 145.5.3.2.2 Variables
- 145.5.3.2.3 Functions
- 145.5.3.2.4 Attribute to state diagram variable mapping
- 145.5.3.2.5 State diagrams
- 145.5.3.3 Single-signature PD power control state diagrams [Go to Page]
- 145.5.3.3.1 Variables
- 145.5.3.3.2 Timers
- 145.5.3.3.3 Functions
- 145.5.3.3.4 Attribute to state diagram variable mapping
- 145.5.3.3.5 State diagrams
- 145.5.3.4 Dual-signature PD power control state diagrams [Go to Page]
- 145.5.3.4.1 Mode designation
- 145.5.3.4.2 Variables
- 145.5.3.4.3 Functions
- 145.5.3.4.4 Attribute to state diagram variable mapping
- 145.5.3.4.5 State diagrams
- 145.5.4 Power requests and allocations
- 145.5.5 State change procedure across a link (single-signature) [Go to Page]
- 145.5.5.1 PSE state change procedure across a link (single-signature)
- 145.5.5.2 PD state change procedure across a link (single-signature)
- 145.5.6 State change procedure across a link (dual-signature) [Go to Page]
- 145.5.6.1 Transitions between 2-pair and 4-pair mode (dual-signature)
- 145.5.6.2 PSE state change procedure across a link (dual-signature)
- 145.5.6.3 PD state change procedure across a link (dual-signature)
- 145.5.7 Autoclass
- 145.6 Environmental [Go to Page]
- 145.6.1 General safety
- 145.6.2 Network safety
- 145.6.3 Installation and maintenance guidelines
- 145.6.4 Patch panel considerations
- 145.6.5 Electromagnetic emissions
- 145.6.6 Temperature and humidity
- 145.6.7 Labeling
- 145.7 Protocol implementation conformance statement (PICS) proforma for Clause 145, Power over Ethernet [Go to Page]
- 145.7.1 Introduction
- 145.7.2 Identification [Go to Page]
- 145.7.2.1 Implementation identification
- 145.7.2.2 Protocol summary
- 145.7.2.3 PD Major capabilities/options
- 145.7.2.4 PSE Major capabilities/options
- 145.7.3 PICS proforma tables for Power over Ethernet [Go to Page]
- 145.7.3.1 Power sourcing equipment
- 145.7.3.2 Powered devices
- 145.7.3.3 Electrical specifications applicable to the PSE and PD
- 145.7.3.4 Electrical specifications applicable to the PSE
- 145.7.3.5 Electrical specifications applicable to the PD
- 145.7.3.6 Data Link Layer classification requirements
- 145.7.3.7 Environmental specifications applicable to PSEs and PDs
- 145.7.3.8 Environmental specifications applicable to the PSE
- Annex A (informative) Bibliography
- Annex 145A (informative) Resistance and current unbalance [Go to Page]
- 145A.1 Intra pair resistance unbalance
- 145A.2 Pair-to-pair unbalance overview
- 145A.3 Pair-to-pair link section resistance unbalance requirements for 4-pair operation
- 145A.4 PSE resistance and current unbalance [Go to Page]
- 145A.4.1 Direct RPSE measurement
- 145A.5 PD resistance and current unbalance
- Annex 145B (informative) Timing diagrams [Go to Page]
- 145B.1 CC_DET_SEQ timing diagrams [Go to Page]
- 145B.1.1 CC_DET_SEQ=0 timing diagrams
- 145B.1.2 CC_DET_SEQ=1 timing diagrams
- 145B.1.3 CC_DET_SEQ=2 timing diagrams
- 145B.1.4 CC_DET_SEQ=3 timing diagrams
- 145B.2 PSE Single-Event Physical Layer classification timing diagram
- 145B.3 PSE Multiple-Event Physical Layer classification timing diagram
- Annex 145C (informative) Power system and parameters [Go to Page]
- 145C.1 Constant power
- 145C.2 Current
- 145C.3 Direct current resistance (DCR)
- 145C.4 Bundled cabling applications
- Back cover
- Blank Page [Go to Page]